基本解釋[電子、通信與自動(dòng)控制技術(shù)]時(shí)鐘數(shù)據(jù)恢復(fù)[計(jì)算機(jī)科學(xué)技術(shù)]時(shí)鐘數(shù)據(jù)恢復(fù)英漢例句雙語例句The main circuits include a trans-impedance amplifier (TIA), a limiting amplifier, a clock and data recovery (CDR) unit, and a (1∶4) demultiplexer (DEMUX).主要電路包括前置放大、限幅放大、時(shí)鐘恢復(fù)、數(shù)據(jù)判決和1∶4分接。Serial communications based on SERDES adopt the clock_data recovery(CDR) instead of both data and clock transmitting, which solve the problem of clock skew.基于SERDES的串行通信過程中采用時(shí)鐘和數(shù)據(jù)恢復(fù)技術(shù)(CDR)代替同時(shí)傳輸數(shù)據(jù)和時(shí)鐘,從而解決了限制數(shù)據(jù)傳輸速率的信號(hào)時(shí)鐘偏移問題。The most difficult problem in burst mode receiver would be signal logic level recovery and data and clock recovery.在突發(fā)式的接收模塊中,邏輯電平的恢復(fù)和時(shí)鐘數(shù)據(jù)的恢復(fù)是其關(guān)鍵的問題。clock data recovery更多例句詞組短語短語clock and data recovery 時(shí)鐘數(shù)據(jù)恢復(fù);時(shí)鐘與數(shù)據(jù)恢復(fù);時(shí)鐘及數(shù)據(jù)恢復(fù);復(fù)電路Clock and Data Recovery Circuits 時(shí)鐘與數(shù)據(jù)恢復(fù)電路parallel clock and data recovery 并行時(shí)鐘數(shù)據(jù)恢復(fù)Clock and Data Recovery Circuit 復(fù)電路;時(shí)脈與資料回復(fù)電路clock and data recovery cdr 時(shí)鐘和數(shù)據(jù)恢復(fù)clock data recovery更多詞組專業(yè)釋義電子、通信與自動(dòng)控制技術(shù)時(shí)鐘數(shù)據(jù)恢復(fù)計(jì)算機(jī)科學(xué)技術(shù)時(shí)鐘數(shù)據(jù)恢復(fù)