基本解釋[經(jīng)濟(jì)學(xué)]主副回路英漢例句雙語例句Major and minor loop areas are computed from simulated B / H characteristics and thereby the hysteresis and eddy current components of the measured no-load loss are calcu1ated.根據(jù)模擬的B／H特性曲線求出主磁滯回線和小磁滯回線的面積，從而計(jì)算出空載損耗實(shí)測(cè)值中的磁滯損耗和渦流損耗分量。major minor loop更多例句詞組短語短語major minor loop organization 主major minor loop更多詞組專業(yè)釋義經(jīng)濟(jì)學(xué)主副回路