基本解釋[電子、通信與自動(dòng)控制技術(shù)]時(shí)序邏輯電路[計(jì)算機(jī)科學(xué)技術(shù)]時(shí)序電路時(shí)序邏輯電路順序邏輯電路[生物學(xué)]時(shí)序性邏輯開(kāi)關(guān)英漢例句雙語(yǔ)例句Computer aided design program of synchronous sequential logic circuit is provided.提出了一種同步型時(shí)序邏輯電路的機(jī)助設(shè)計(jì)程序。This paper presents a multiple fault test simulator for sequential logic circuit. The simulator is implemented in serial-parallel to save memory.本文給出一個(gè)時(shí)序邏輯電路的多故障測(cè)試模擬程序。Building the transition relation of sequential logic circuit is one of the key technologies for applying model checking method to verify the sequential logic circuit.有效地建立和表示時(shí)序邏輯電路的狀態(tài)轉(zhuǎn)移關(guān)系是應(yīng)用模型檢查方法驗(yàn)證時(shí)序邏輯電路的關(guān)鍵技術(shù)之一。sequential logic circuit更多例句詞組短語(yǔ)短語(yǔ)Sequential Logic Circuit Design 時(shí)序邏輯電路設(shè)計(jì)Sequential Logic Circuit Technology 時(shí)序邏輯電路技術(shù)synchronous sequential logic circuit 同步時(shí)序邏輯電路the sequential logic circuit analysis 時(shí)序邏輯電路分析design synchronous sequential logic circuit 同步時(shí)序邏輯電路設(shè)計(jì)sequential logic circuit更多詞組專(zhuān)業(yè)釋義電子、通信與自動(dòng)控制技術(shù)時(shí)序邏輯電路計(jì)算機(jī)科學(xué)技術(shù)時(shí)序電路時(shí)序邏輯電路順序邏輯電路生物學(xué)時(shí)序性邏輯開(kāi)關(guān)