常見(jiàn)例句EDAC,TMR and CFC were implemented in VHDL on FPGA. 用VHDL描述竝在FPGA上實(shí)現(xiàn)EDAC、TMR和CFC.Output formats are EDIF, XNF and VHDL. 輸出格式是EDIF,XNF和VHDL。EDAC, TMR and CFC were implemented in VHDL on FPGA. 用VHDL描述竝在FPGA上實(shí)現(xiàn)EDAC、TMR和CFC。Application of VHDL in the design of digital circuits. 在數(shù)字電路設(shè)計(jì)中的應(yīng)用。Pedroni, V.A., Circuit Design with VHDL, MIT Press, USA, 2004. 唐珮忠,VHDL與數(shù)位邏輯設(shè)計(jì),高立圖書(shū)有限公司,臺(tái)北,臺(tái)灣,2004。C.H.Roth, Digital system design using VHDL, PWS Oub., 1998. 蕭如宣,VHDL數(shù)位系統(tǒng)電路設(shè)計(jì),儒林出版社,1999。 返回 VHDL