phaselocked

基本解釋

Digital phaselocked speed system is actually a nonlinear system.
數(shù)字鎖相速率系統(tǒng)實質是一個非線性系統(tǒng)。
Abstract: Digital phaselocked speed system is actually a nonlinear system.
文摘:數(shù)字鎖相速率系統(tǒng)實質是一個非線性系統(tǒng)。
The successful application of phaselocked loop technique to electro de adjustment is introduced,pulse forming and adjusting principle are analysed.
介紹了鎖相環(huán)技術在電爐電極調節(jié)中的成功應用，分析了脈沖形成及調節(jié)原理。
This paper introduces the successful application of phaselocked loop in electrode regulation system and analyzes the pulse form and adjustment principle.
介紹了鎖相環(huán)技術在電爐電極調節(jié)中的成功應用，分析了脈沖形成及調節(jié)原理。
Several blocks such as ELST, CRC coder/decoder, Bit synchronousdigital phaselocked loop and jitter attenuate digital phase locked loop aredescribed in detail.
論文對作者所設計實現(xiàn)的部分模塊作了較爲詳細的介紹，包括彈性存儲器的設計和CRC編解碼的設計以及位同步數(shù)字鎖相環(huán)和抖動衰減鎖相環(huán)的設計。